Advanced Search

Show simple item record

dc.contributor.authorKoyuncu, İsmail
dc.contributor.authorÇetin, Özdemir
dc.contributor.authorKatırcıoğlu, Ferzan
dc.contributor.authorTuna, Murat
dc.date2019-07-02
dc.date.accessioned2019-07-02T12:30:32Z
dc.date.available2019-07-02T12:30:32Z
dc.date.issued2015
dc.identifier.citationKoyuncu, İ., Çetin, Ö., Katırcıoğlu, F., & Tuna, M. (2015, May). FPGA Tabanlı Sobel Operatör İle Kenar Belirleme Uygulaması. In 2015 23nd Signal Processing and Communications Applications Conference (SIU) (pp. 1829-1832). IEEE.
dc.identifier.urihttps://ieeexplore.ieee.org/abstract/document/7130211
dc.identifier.urihttps://hdl.handle.net/20.500.11857/1003
dc.description.abstractImage processing can be defined as analysis of the images consists of the several steps. The edge detection process that is one of these steps can be performed using a variety of operators. Sobel edge detection operator, is a basic operator, is preferred to use with high noisy images because its corruption is insensible on images. The proposed work presents an edge detection algorithm using Sobel operator based on FPGA architecture. Proposed system is designed using IEEE 754-1985 floating-point standard and VHDL hardware description language. Design is synthesized for Xilinx Virtex-6 FPGA chip with 160 MHz operating frequency. The performance is decreed according chip statistics.
dc.description.abstractImage processing can be defined as analysis of the images consists of the several steps. The edge detection process that is one of these steps can be performed using a variety of operators. Sobel edge detection operator, is a basic operator, is preferred to use with high noisy images because its corruption is insensible on images. The proposed work presents an edge detection algorithm using Sobel operator based on FPGA architecture. Proposed system is designed using IEEE 754-1985 floating-point standard and VHDL hardware description language. Design is synthesized for Xilinx Virtex-6 FPGA chip with 160 MHz operating frequency. The performance is decreed according chip statistics.
dc.language.isotur
dc.publisherIEEE
dc.rightsinfo:eu-repo/semantics/openAccess
dc.subjectFPGA
dc.subjectSayısal Görüntü İşleme
dc.subjectKenar Belirleme
dc.subjectSobel Operatörü
dc.subjectVHDL
dc.subjectDigital Image Processing
dc.subjectEdge Detection
dc.subjectSobel Operator
dc.titleFPGA Tabanlı Sobel Operatör İle Kenar Belirleme Uygulaması
dc.title.alternativeEdge Dedection Application With FPGA Based Sobel Operator
dc.typepresentation
dc.authoridhttps://orcid.org/0000-0003-3511-1336
dc.departmentMeslek Yüksekokulları, Teknik Bilimler Meslek Yüksekokulu, Elektrik ve Enerji Bölümü
dc.relation.publicationcategoryDiğer


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record