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Fixed and Floating point-Based High-Speed Chaotic Oscillator Design with Different Numerical Algorithms on FPGA
In this paper, the design of 3D PC chaotic system has been implemented using Euler, Heun, RK4 and RK5-Butcher numerical algorithms in VHDL with 32 bit IQ-Math fixed point number format (16I-16Q) on FPGA. The chaotic ...
High speed FPGA-based chaotic oscillator design
(Microprocessors and Microsystems, Elsevier, 2019)
In this study, autonomous Lü-Chen (2002) chaotic system has been implemented on FPGA using Heun numerical algorithm in VHDL 32-bit IQ-Math fixed-point number format for developing embedded chaosbased engineering applications. ...