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Yapay Sinir Ağları-Tabanlı 3-B Yeni Jerk Kaotik Osilatörünün FPGA Üzerinde Tasarımı ve Gerçeklenmesi
In this paper, the 3-D novel Jerk chaotic system has been coded in Very High Speed Integrated Circuits Hardware Description Language (VHDL) with 32-bit IEEE-754-1985 floating point number standard for real-time Artificial ...
IQ-Math Based Designing of Fourth Order Runge-Kutta Algorithm on FPGA and Performance Analysis According to ANN Approximation
In this paper, the design of the fourth order Runge-Kutta (RK4) algorithm has been performed using 32- bit IQ-Math (16I-16Q) fixed point number format in VHDL on FPGA. The designed system has been implemented into 3-B ...